WP4 Measurement and test technology for neuromorphic electronics
The AP4 deals with all aspects around the electrical characterization of memristive devices and circuit blocks to be used in neuromorphic systems. In order to be able to comprehensively characterize the components, matrix structures and circuit blocks produced in NEUROTEC II, AP4 was already equipped with innovative measurement technology in the first project phase. This will be further developed in the second project phase in close cooperation with our industrial partners aixACCT Systems as well as AMOtronics within the subproject K3 (link). Among other things, AI-supported algorithms for data analysis are to be integrated directly into the test environment here.
Within WP4, there are three areas of focus:
1. ultra-fast measurements (sub-nanoseconds)
2. statistics and peculiarities of matrix structures
3. integrated circuit blocks and reliability analyses
In the field of ultra-fast measurements, the switching kinetics of memristive devices is investigated down to the sub-nanosecond range in order to characterize their speed limitations. As a new world record, it has already been shown here that VCM (valence change mechanism) cells can be turned on within 50 ps (SET) [10.1063/5.0003840]. In the opposite direction (RESET), an intrinsic limitation was found. Below 250 ps, an increase in RESET voltage no longer leads to shorter switching times. Instead, an unwanted, unipolar SET occurs [10.1021/acsaelm.1c00981].
Further goals of the ultra-fast characterization are the realization of STP (short-term plasticity) and LTP (long-term potentiation), as well as analog operation modes on the sub-nanosecond time scale. An extension of the measurement technique will also enable ultra-fast characterization of ECM (electrochemical migration) and PCM (phase change mechanism) cells. Furthermore, the high speed can be used for cycling stability measurements beyond 10^7 switching cycles.
In the second topic area of WP4, innovative measurement technology is used to characterize arrays of memristive elements. Here, some reliability issues of VCM cells could already be addressed. First, it has been shown that VCM cells exhibit ionic noise in the read current due to the random movement of oxygen vacancies. When many cells are considered in an array, this noise leads to a characteristic distribution. The width of this in turn limits the number of states that can be reliably distinguished [10.1109/TED.2020.3018096]. This instability on short time scales, together with the long-term stability, could be explained in a consistent model by the movement of oxygen vacancies [10.1021/acsami.1c14667]. In addition, cycling stability was investigated up to 10^7 cycles using a specially developed algorithm [10.1109/TED.2021.3049765].
Further goals are the realization of neuromorphic (SNN - Spiking Neural Network) and computation-in-memory (CIM) functionalities in memristive arrays. The innovative tester enables combined hardware/software solutions to emulate ANNs (Artificial Neural Networks).
The last topic of WP4 transfers the results of the single cell and array characterization into the analysis of integrated circuit blocks and performs comprehensive reliability analyses. On the one hand, these consider fabrication-related faults that occur at time t_0. The goal is to develop optimized manufacturing test strategies that can reliably detect defects directly after manufacturing. On the other hand, designed-for-testability (DFT) strategies are applied and fault tolerance approaches are developed to detect defects occurring during lifetime directly in operation.
Through a comprehensive analysis of the manufacturing process of VCM cells, some possible failure mechanisms have already been identified. These mechanisms have been discussed in the context of possible defects occurring in the devices. The results now enable the development of more precise failure models and thus better test strategies [10.1007/s10836-021-05968-8].