The need
While the NEUROTEC-I demonstrator chip co-integrated memristors on 180nm node CMOS, a more advanced node (28 nm) is necessary for exploiting the potentials for energy-efficiency of compute-in-memory (CIM) and ternary content addressable memory (TCAM).
Key Features
OTTER D0 Demonstrator Chip
- Co-Integration IC
- TCAM & CIM circuits
- Memristor Characterization
- Verification of compact models


Impact
- Publication: "OTTER - Two Transistor - One RRAM Architecture for Reliable in Memory Computing in 28nm Technology" (in preparation)
- Focus on one memristor type (Pt/TaOx/Ta/Pt) for reliable processing
- Learnings for ORCA : TCAM structures dysfunctional after BEOL processing
Demonstrator Chip OTTER
Letzte Änderung: 25.06.2026









